Prof. Dr.-Ing. Reiner Hartenstein
http://hartenstein.de
The Sitemap
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Survey (Übersicht)
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How CHDL, the Worlds only fully
competent Conference Series
about Hardware Description
Languages has been killed
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How to Cope with
the Power Wall
Sitemap 1
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in Social Networks
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XING
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LinkedIn
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Twitter
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facebook
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Reiner Hartenstein
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All Publications
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special publication lists
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Keynote Addresses
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Reiner‘s Books
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Citations
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personal stuff
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Activities
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The Hall of Fame
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in memoriam
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Reiner‘s Biography
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about Karl Steinbuch
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Namesakes
(Namensvettern)
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The Christian Origin
of Reiners Last Name
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Organizing Conferences
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Fig. 2: The World‘s first
complete VLSI Design
Framework: KARL-based
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KARL: the World‘s leading
Hardware Description
Language during the 80ies
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Introducing the Mead-&-
Conway Revolution to
the Continent (EurAsia)
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The first graphic
hardware design language
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Fig. 7: Shuffle Sort Algorithm
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Trailblazing the use of
Term Rewriting (TR)
for Synthesis in EDA
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The Domino Notation
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The Anti-Machine
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Morphware
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Configware
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Data Streams
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The Xputer
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Speed-up by 4 orders
of magnitude: 15 Years
earlier than Mainstream
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Heterogeneous
Supercomputing
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How to invent something
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Introducing Structured
VLSI Design
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RC Terminology
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Reconfigurable
Computing (RC)
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Der Stromverbrauch von
vN Computern wird
unbezahlbar werden
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The Energy Consumption
of vN Computers will
become unaffordable
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The Massively Energy-
inefficient von Neumann
(vN) Machine Paradigm
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The wrong Roadmap
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The KressArray
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Why we need to
reinvent Computing
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Speed-ups by FPGAS
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Saving Energy by
FPGA Usage
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Xputer-related
Literature
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Address Generators
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The MoM Processor
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The Data Stream
Language MoPL
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DPLA: much more
efficient than FPGAs
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University Homepage
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Bildungspolitik: die
IT-Herausforderung
http://hartenstein.de/sitemap.pdf
not yet completed: we are still working at it !!